1. Field of the Invention
The invention relates in general to a computer system with a hyper-transport bus, and more particularly to a computer system having a hyper-transport bus and a non-support hyper-transport processor, and a controlling method of the hyper-transport bus.
2. Description of the Related Art
A computer system is mainly composed of an input unit, an output unit, a control unit, a memory unit and an arithmetic logic unit, wherein data are transmitted between the units through a bus so that the efficiency of the computer system may be enhanced.
Buses may be classified into a data bus, an address bus, a control bus, an expansion bus and a local bus. The transmission capability of the bus depends on a bandwidth of the bus, which is equal to a bus width multiplied by a working frequency. The working frequency is also referred to as a bus speed. For example, if the bus width is 8 bits or 16 bits, it means that the bus can transmit 8 bits or 16 bits of data at a time. The working frequency takes a clock as an operation unit. If the working frequency is 100 MHz and the bus width is 8 bits, it represents that the data can be transmitted at the speed of 100 MB per second. Similarly, if the bus width is 16 bits, it represents that the data can be transmitted at the speed of 200 MB per second.
However, the typical processor transmits data at the lower working frequency and the lower bus width during the booting procedure. If the working frequency and the bus width have to be increased, the computer system needs more signal lines to transmit the control signals to change the working frequency and the bus width. If the number of signal lines is increased, the electromagnetic interference between the signal lines tends to generate. In addition, the complexity of the circuit layout is increased with plenty of signal lines deposited on a printed circuit board (PCB).